Fpga Based Efficient Interleaver Design with High Speed Architecture for Ofdm Systems

The next generation wireless communications systems need to be of a higher standard in order to provide high quality of services. In recent years, Orthogonal Frequency Division Multiplexing (OFDM) has been successfully used in terrestrial digital video broadcasting and showed it is a strong candidate for the modulation technique of future wireless systems. For Multiple input mutiple output orthogonal frequency division multiplexing based communication systems on FPGA a memory – efficient and faster interleaver implementation technique is to be described . For simulation, implementation and analysis,the IEEE 802.16 standard is being used as a reference .The encoding block for the OFDM transmitter is to be presented and this in turn can be used as the input for interleaver design on FPGA and its memory utilization results need to be analysied . Keywords-component: Orthogonal Frequency Division Multiplexing, MIMO-OFDM, IEEE 802.16, Matrix Interleaver,